Improving the Reachability Analysis Technique by Circuit Retiming
نویسندگان
چکیده
Implicit reachable state computation can be applied to a wide range of sequential formal veriication and logic synthesis problems. Symbolic manipulation with BDDs is one of the most eecient techniques known for the reachability analysis. The technique was rst proposed by Coudert et al. in 1989, and was improved later by Touati et al. in 1990. The standard approach chooses the cut of a sequential circuit which consists of the output of all the latches. Choosing a valid cut diierent from the original one will change the complexity of the reachability analysis. Also the reachability information of the retimed circuit is always possible to be transformed back to that of the original circuit with the standard cut. This project explored the circuit retiming for improving the reachability analysis.
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